CP400P/E Interface Card

The CP400P/E cards are 1-, 2- and 4-span T1, E1 or J1 cards manufactured by Allo. Some variations of these cards were previously manufactured by Varion. They are a replacement for the V401P cards previously manufactured by Varion. The figure below shows a picture of a CP400P/E card (other variations of number of spans and PCI bus are available).

The CP400P/E cards have a slightly lower level of signalling performance due to the lack of on-board HDLC functions. Transfers to the host processor over the PCI bus use PCI I/O ports and memory mapping. In general, this is not a limiting factor.

Driver

All variations of these cards are supported by the X400 driver.

The function of the CP400P/E Channel driver is to provide for the termination of 2.048Mbps, 1.544Mbps, 64kbps and 56kbps digital paths. This driver provides direct access to the channelized or unchannelized T1, J1 or E1 digital paths to OpenSS7 media and signalling protocol modules as well as providing T1, J1 or E1 management, framing, coding, alarms, and synchronization.

Features

Following are some features of the CP400P/E cards:

1, 2 or 4 T1/E1/J1 spans per card.
Both PCI and PCIe versions.
Dallas framer.
PLX PCI 9030 PCI bus chip.
Xilinx Spartan XC2S50 processor.
Raw transfer of octets from framers to PCI bus.
Uses OpenSS7 Soft-HDLC engine for SS7, ISDN and ISO.
96 channels per card (CP400P/E) in T1 or J1 mode.
124 channels per card (CP400P/E) in E1 mode.
Full span addressable.

Advantages

Following are the advantages of the CP400P/E cards:

Low cost.
PC Compatibility (both PCI and PCIe).
Base on designs released by Jim Dixon under the GNU Public License.
Open Hardware design: schematics, artwork and Gerber plots available.
Flash programmable Xilinx chip.
Field upgradable.
Supports a number of Open Source drivers.
Dahdi (Zaptel) driver support.
Programmable synchronization across cards.

Disadvantages

Following are the disadvantages of the CP400P/E cards:

Lower performance.
No on-board HLDC.
Cannot TDM switch on card or between cards, media channels must be transferred through host to switch between cards.
I/O Port and Memory Map instead of PCI DMA bus-mastering and burst transfers.
No integrated Ethernet for SIGTRAN and VoIP applications.

Ultimately, the performance limiting factor of the CP400P/E cards is the bandwidth of the PCI/PCIe bus and the ability of the processor to perform Soft-HDLC and TDM switching in software. A 350MHz processor is capable of processing the bandwidth of an entire CP400P/E card in E1 mode (124 signalling links) with a combined link throughput of 8.192 Mbps.

For OpenSS7, this performance is more than adequate. A medium grade single-core 2GHz PC is capable of handling more than two cards (more than 248 SS7 links) with adequate excess capacity available for background operations.

These cards are very cost-effective and can provide 64kbps SS7 links at average incremental interface cost of approximately $4.00 USD per signalling link.

Disclaimer

Note: Some of the information in this hardware selection guide may be incomplete, incorrect, out of date, or inconsistent with the vendor's actual offerings. Also note that this hardware selection guide does not constitute an endorsement of anyone's product or service. The authors of the OpenSS7, their sponsors, agents and representatives will not take responsibility in it.

Please use good business sense when considering any vendor's products and consult with the individual vendor before making any decisions. Please do, however, investigate the product and service offerings of the sponsors listed on our Sponsors page: it is through your support of our sponsors that the OpenSS7 Project exists and is funded to continue.